The present invention relates to graphics processing systems in general, and more particularly to zero frame buffer graphics processing systems.
Graphics processing units (GPUs) are included as a part of computer, video game, car navigation, and other electronic systems in order to generate graphics images on a monitor or other display device. The first GPUs to be developed stored pixel values, that is, the actual displayed colors, in a local memory, referred to as a frame buffer.
Since that time, the complexity of GPUs, in particular the GPUs designed and developed by NVIDIA Corporation of Santa Clara, Calif., has increased tremendously. Data stored in these frame buffers has similarly increased in size and complexity. This data now includes not only pixel values, but also textures, texture descriptors, shader program instructions, and other data and commands. These frame buffers are now often referred to as graphics memories, in recognition of their expanded roles. The term frame buffer continues to be commonly used, however.
One attribute of the frame buffer that has not changed is its location. The frame buffer is still intimately associated with the graphics processor. For example, graphics processing cards typically have a graphics processing unit and one or more memory devices for the frame buffer. One reason has been the limited bandwidth to other portions of the electronic system that has been available to the graphics processing unit. Until recently, in computer systems, the GPU has communicated with the CPU and other devices over an advanced graphics port, or AGP bus. While faster versions of this bus were developed, it always remained behind the actual needs of the GPU. Accordingly, the frame buffer remained close to the GPU, where access was not limited by the AGP bus bottleneck.
However, a new bus has been developed, an enhanced version of the peripheral component interconnect (PCI) standard, or PCIE (PCI express). This bus protocol has been greatly improved and refined by NVIDIA Corporation of Santa Clara, Calif. This in turn has now allowed a rethinking of the location of the frame buffer.
Accordingly, what is needed are circuit, methods, and apparatus that take advantage of this increased data bus bandwidth to eliminate the frame buffer previously required by graphics processing units.